However, at 1 ns edge rates a trace longer than about 2. Do you know if this is due to xgmiitorgmii is not working well? Depending on your situation, you might need to configure your proxy too in linux. Apr 27, 2: Is there any working example of a device tree for my case? And now I am little confused as to what constitutes an Ethernet?

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These registers can be used to configure the device say “only gigabit, full duplex”, or “only full duplex” or can be used to determine the current operating mode. We are glad that we were liunx to resolve this issue, and will now proceed to close this thread. By using this site, you agree to the Terms of Use and Privacy Policy.

If you have a related question, please click the ” Ask a related question ” button in the top right corner. The TX clock delay is enabled by setting bit 4 of register 21 of page 2. Depending on your situation, you might need to configure your proxy too in linux. This means a slight modification of the definition of CRS: It does this by clock forwarding a clock with a 90 degrees phase shift with respect to the clock that is used to output the data signals.

Media-independent interface

Hope it helps, I dont know much about the upper layers sadly. At power up, using autonegotiationthe PHY usually adapts to whatever it is connected to unless settings are altered via the MDIO interface. We are glad that we were able to resolve this issue, and will now proceed linuc close this thread. Source-synchronous clocking is used: I created 2 files: The address defaults to ‘8’, so I doubt this is the problem, but rgmik check it. The device tree will contain a section for each of your Ethernet interfaces and it should look similar to the one shown to the right.


Doing it in the DTS is probably easier and doesn’t require a bitstream regeneration. On my board the phy’s address is ‘0’, which is actually bad, because it’s the MDIO tgmii address but I cannot change it on my board for now.

The management interface controls the behavior of the PHY. Here is an example: You can use u-boot’s mdio utility. Use of the information on rgmki site may require a license from a third party, or a license from TI. When unticked, the core will output the TX clock with 2ns of skew.

However, to get the complete picture, we must also consider the length of the traces on the FPGA board.

configure linux kernel for RGMII

Although the PCB traces can be designed to implement the clock skew, in most kinux this is the least ideal location to implement the skew, so most board designers will route RGMII clock and data traces that are length matched. And also one ethernet device driver should work with the NIC hardware. Apr 26, 1: Archived from the original on Can you please share?


In reply to shawn lin: If you are experiencing one of the following problems, then you probably have an issue rgmiii your RGMII interface: How this is handled depends on whether you are running Linux or a stand-alone application.

PHY – physical layer – converts a stream of bytes from the MAC into signals on one or more wires or fibres. This is the part of rtmii system which converts a packet from the OS into a stream of bytes to be put on the wire or fibre. All postings and use of the content on this site are subject to the Terms of Use of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms of Use of this site.

networking – Clarification on Ethernet, MII, SGMII, RGMII and PHY – Stack Overflow

Trademarks Privacy Policy Terms of Use. Rgmiu media independent means that different types of PHY devices for connecting to different media i. This thread has been locked.